Central Processing Unit (CPU) architecture

Computer Science AS · Processor fundamentals. The idea in plain words, the rules to remember, the mistake to avoid and a worked example, written and checked by Mega Lecture.

Test this topic free All Computer Science AS topics

The idea

In the Von Neumann model, instructions and data are held together in the same memory, and the processor fetches and runs the instructions one after another. This is the stored program concept.

The CPU has a Control Unit, which sends signals to manage the other parts, an Arithmetic and Logic Unit (ALU), which does calculations and comparisons, and registers, which are very fast stores inside the processor. Three buses carry addresses, data and control signals between the CPU and memory.

The processor repeats the Fetch-Execute cycle. At the end of each cycle it checks for an interrupt: a signal from a device or program that needs attention.

Rules to remember

PC: address of the next instruction. MAR: address of the memory location to be read or written. MDR: the data just read or about to be written. CIR: the instruction being decoded and executed
ACC: results from the ALU. IX: index register, used for indexed addressing. Status Register: flags such as carry, negative and overflow
Fetch: MAR ← [PC]; PC ← [PC] + 1; MDR ← [[MAR]]; CIR ← [MDR]
[X] means the contents of X; [[MAR]] means the contents of the memory location whose address is in MAR
Address bus: one direction, CPU to memory; n lines can address 2ⁿ locations. Data bus: both directions. Control bus: carries signals such as read, write, clock and interrupt
Performance improves with more cores, a higher clock speed, wider buses and more cache memory
Interrupt: checked at the end of each cycle; the contents of the registers are saved, the PC is loaded with the address of the Interrupt Service Routine (ISR), and the registers are restored afterwards

Common mistake

Students say the PC holds the current instruction. The PC holds only an address, the address of the next instruction; the instruction itself is in the CIR.

Worked example

The PC contains 200 and memory location 200 contains the instruction LDD 85. What do the MAR, PC and CIR contain at the end of the fetch stage?

MAR ← [PC]: the MAR now contains 200.
PC ← [PC] + 1: the PC now contains 201.
MDR ← [[MAR]]: the contents of location 200, the instruction LDD 85, are copied to the MDR.
CIR ← [MDR]: the instruction LDD 85 is copied to the CIR.

Answer: MAR = 200, PC = 201 and the CIR holds LDD 85.

Ask about this

Type what you are stuck on. The helper finds the explanation, worked examples and the notes to read, free and instant.

Read the full notes

Central Processing Unit (Chapter 4.1) (PDF)

Keep going

← Logic gates and logic circuits Assembly language →Take a Computer Science AS test